The electronic device can include a “working-usually” device and a “standby-often” device. For examples, a mobile device is a working-usually device and an Internet of Things (IoT) device is a standby-often device. The IoT may include a smart gate lock, window security device and health care device, a smart watch, a smart ring and so on. If the IoT device needs to change battery every one or two weeks, that does not make sense. The major concern of the electronic device is about the power consumption and the battery life thereof. The power management can improve the chip's power efficiency so as to prolong the battery life and the operating time.
An electronic device requires an oscillator to provide with a clock to maintain its function, even if the electronic device is in an idle state, it still needs clock to let the entire system of the electronic device be monitored. Temperature, process variation of different lot of wafer, and capacitor loading may affect a workable clock of the oscillator, so the clock needs to be calibrated.
Although the electronic device is designed to have low power consumption, it still needs power to support a standby mode in order that it wakes up to function normally, therefore the calibration of the clock powered by a power source in the idle mode plays an important role for saving power. Please refer to FIG. 1, which shows power consumption in the different applications in the prior art. The horizontal axis represents time and the vertical axis represents a power consumption. The illustration in Application I shows a timing diagram regarding to the power consumption in the mobile device, and the illustration in Application II shows a timing diagram regarding to the power consumption in the IoT device. In FIG. 1, the mobile device and the IoT device respectively have periods t_prid1 and t_prid2 which can be the same, the active time t_act of the IoT device is relatively shorter than that of the mobile device, typically about a time level from milli-seconds to a few seconds, and there is lower power consumption to be made because the duration of the active time t_act is relatively short. However, the sleep time t_sleep of the IoT device is relatively longer than that of the mobile device, typically about a time level of days, therefore a power source reduction of driving the clock can contribute a lot for power saving and prolong the battery life further. For example, it may reach to a goal of ten-year battery life of the IoT device.
Please refer to FIG. 2, which shows a conventional clock calibration circuit 10. The conventional clock calibration circuit 10 includes a power source 101, an inverting amplifier 102, a crystal resonator 104, load capacitors C1 and C2, and an analog amplitude calibration circuit 103. The analog amplitude calibration circuit 10 includes a peak detector 1031, a capacitor C3 and a comparator 1032. The power source 101 provides enough current to the inverting amplifier 102, and the amplifier 102, in response to the current provided from the power source 101, inverts a phase of a clock CK1 signal generating from the crystal resonator 104, and outputs a clock signal CK2 to the peak detector 1031. The peak detector 1031 can be implemented by a differential amplifier or alike.
Please refer to FIG. 3, which shows the peak detector 1031 implemented 1033 in the prior art. The peak detector 1033 may include two transistors M1, M2, which are coupled in parallel, and coupled to the capacitor C3 and a resistor R0. The differential amplifier 1033 receives complementary signals Vin+ and Vin− to output an envelope signal Senv. For example, clock signals CK1 and CK2 are inputted into gate terminals of the two transistors M1 and M2 respectively. The envelope signal Senv of the peak detector 1031 is shown in FIG. 4. The voltage waveform way of the envelope signal Senv is tooth-like. Capacitor C3 is charged when either Vin+ or Vin− approach their maximum peak value while it is discharged via R0 when Vin+ and Vin− close to their average value. This continuous charging and discharging on C3 creates an average voltage Vavg on C3 which is directly proportional to the input amplitude of Vin+ or Vin−. The comparator 1032 compares the average voltage Vavg with a reference voltage Vref to output a feedback signal Sfb to adjust the power source 101. The reference voltage Vref needs to be set to assure that the power source 101 provides enough current to the inverting amplifier 102 in order to support the clock signals CK1 and CK2 to work normally. In order to let the clock signals CK1 and CK2 work normally, the amplitude of which is about 200˜300 mV typically.
Please refer back to FIG. 2, while the analog amplitude calibration circuit 103 is powered, a quiescent current flowing therein makes power consumption; and the IoT device often include at least one of a conventional clock calibration circuit 10, so that the total power consumption is relatively large. The quiescent current in the analog amplitude calibration circuit 103 consumes 1˜5 uA of the quiescent current typically, and it will consume a large amount of power as long as the idle mode keeps a long period, therefore the structure in the analog amplitude calibration circuit 103 is not suitable for the IoT device at a low power condition. In addition, if the frequency of the clock signal CK1, CK2 is relative low, for example typical 32 kHz, then a time constant of capacitor C3 will be large, which causes a large-capacity on-chip capacitor C3 to occupy large chip area. In addition, in order to generate the reference voltage Vref, there is a need to add other peripheral circuit, which results in relative large power consumption.
On the other hand, some factors can affect the clock signals CK1, CK2 of the crystal resonator 104. They include temperature, humidity, voltage/current sparks, process variation, capacitor loading, so the clock signals CK1, CK2 need to be calibrated for accuracy demanding applications.
Furthermore, saving the chip area and saving the power consumption are also expected. Accordingly, there is a need for a method and a module to reduce the power consumption, simultaneously calibrate the clock signal to run in an economical power and keep it in a relatively stable state, and have an economical chip area.
In addition, it is expected that the clock signal is always monitored and can be optimized to save power and be calibrated automatically whenever it is abnormal.